based on that and the actual request, the thesis focuses on two ways of frequency synthesis : phase-loop locked and phase-loop locked + direct digital synthesis . then it introduces the concepts of group-delay and all-pass network, analyzes the theory of equalizing the group-delay of filter by all-pass network, simulates the design and sums up a perfect designing and debugging precept 中頻群延遲的均衡通過(guò)全通網(wǎng)絡(luò)來(lái)實(shí)現(xiàn),文中給出了信號(hào)傳輸中群延遲的概念以及全通網(wǎng)絡(luò)的概念,詳細(xì)分析了全通網(wǎng)絡(luò)用作群延遲均衡器的設(shè)計(jì)原理,并對(duì)設(shè)計(jì)進(jìn)行了計(jì)算機(jī)仿真,給出了滿(mǎn)足要求的設(shè)計(jì)方案。
based on that and the actual request, the thesis focuses on two ways of frequency synthesis : phase-loop locked and phase-loop locked + direct digital synthesis . then it introduces the concepts of group-delay and all-pass network, analyzes the theory of equalizing the group-delay of filter by all-pass network, simulates the design and sums up a perfect designing and debugging precept 中頻群延遲的均衡通過(guò)全通網(wǎng)絡(luò)來(lái)實(shí)現(xiàn),文中給出了信號(hào)傳輸中群延遲的概念以及全通網(wǎng)絡(luò)的概念,詳細(xì)分析了全通網(wǎng)絡(luò)用作群延遲均衡器的設(shè)計(jì)原理,并對(duì)設(shè)計(jì)進(jìn)行了計(jì)算機(jī)仿真,給出了滿(mǎn)足要求的設(shè)計(jì)方案。